risingwave_common/transaction/
transaction_id.rs

1// Copyright 2025 RisingWave Labs
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7//     http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15use std::sync::atomic::{AtomicU32, Ordering};
16
17use crate::util::worker_util::WorkerNodeId;
18
19const WORKER_ID_SHIFT_BITS: u8 = 32;
20
21/// `TxnIdGenerator` generates unique transaction ids as following format:
22///
23/// | worker id | sequence |
24/// |-----------|----------|
25/// |  32 bits  | 32 bits  |
26///
27/// Currently, we just need to guarantee the transaction ids are unique at runtime.
28/// It doesn't matter, even if the sequence starts from zero after recovery.
29#[derive(Debug)]
30pub struct TxnIdGenerator {
31    worker_id: u32,
32    sequence: AtomicU32,
33}
34
35pub type TxnId = u64;
36
37impl TxnIdGenerator {
38    pub fn new(worker_id: WorkerNodeId) -> Self {
39        Self {
40            worker_id,
41            sequence: AtomicU32::new(0),
42        }
43    }
44
45    pub fn gen_txn_id(&self) -> TxnId {
46        let sequence = self.sequence.fetch_add(1, Ordering::Relaxed);
47        (self.worker_id as u64) << WORKER_ID_SHIFT_BITS | sequence as u64
48    }
49}
risingwave_common/transaction/transaction_id.rs

risingwave_common/transaction/
transaction_id.rs
